产品详情
说明： verilog时序图编写和测试代码，代码完整已经经过测试可以运行。
(verilog timing diagram writing and testing code, the code has been tested to the full run.)
(verilog timing diagram writing and testing code, the code has been tested to the full run.)
文件列表：
ads1675_if
..........\ads1675_if.v,7995,2011-07-19
..........\readme.txt,164,2011-07-20
..........\tb
..........\..\ads1675_if_tb.v,5190,2011-07-19
..........\..\run.bat,116,2011-07-21
..........\..\sim.do,593,2011-07-21
..........\..\sim.do.bak,651,2011-07-19
..........\..\transcript,823,2011-07-21
..........\..\vsim.wlf,188416,2011-07-19
..........\..\work
..........\..\....\ads1675_if
..........\..\....\..........\verilog.asm,29928,2011-07-19
..........\..\....\..........\verilog.rw,10826,2011-07-19
..........\..\....\..........\_primary.dat,3360,2011-07-19
..........\..\....\..........\_primary.dbs,9448,2011-07-19
..........\..\....\..........\_primary.vhd,1703,2011-07-19
..........\..\....\ads1675_if_tb
..........\..\....\.............\verilog.asm,19840,2011-07-19
..........\..\....\.............\verilog.rw,8560,2011-07-19
..........\..\....\.............\_primary.dat,2061,2011-07-19
..........\..\....\.............\_primary.dbs,4547,2011-07-19
..........\..\....\.............\_primary.vhd,194,2011-07-19
..........\..\....\link_loc_top_tb
..........\..\....\...............\_primary.dat,6073,2011-07-19
..........\..\....\...............\_primary.dbs,16268,2011-07-19
..........\..\....\...............\_primary.vhd,205,2011-07-19
..........\..\....\_info,878,2011-07-19
..........\..\....\_temp
..........\..\....\.....\vloge6tzzm,2885,2011-07-19
..........\..\....\.....\vlogenczft,6014,2011-07-19
..........\..\....\.....\vlogwci22s,6530,2011-07-19
..........\..\....\.....\vlogwng2ks,3831,2011-07-19
..........\..\....\_vmake,26,2011-07-19
..........\ads1675_if.v,7995,2011-07-19
..........\readme.txt,164,2011-07-20
..........\tb
..........\..\ads1675_if_tb.v,5190,2011-07-19
..........\..\run.bat,116,2011-07-21
..........\..\sim.do,593,2011-07-21
..........\..\sim.do.bak,651,2011-07-19
..........\..\transcript,823,2011-07-21
..........\..\vsim.wlf,188416,2011-07-19
..........\..\work
..........\..\....\ads1675_if
..........\..\....\..........\verilog.asm,29928,2011-07-19
..........\..\....\..........\verilog.rw,10826,2011-07-19
..........\..\....\..........\_primary.dat,3360,2011-07-19
..........\..\....\..........\_primary.dbs,9448,2011-07-19
..........\..\....\..........\_primary.vhd,1703,2011-07-19
..........\..\....\ads1675_if_tb
..........\..\....\.............\verilog.asm,19840,2011-07-19
..........\..\....\.............\verilog.rw,8560,2011-07-19
..........\..\....\.............\_primary.dat,2061,2011-07-19
..........\..\....\.............\_primary.dbs,4547,2011-07-19
..........\..\....\.............\_primary.vhd,194,2011-07-19
..........\..\....\link_loc_top_tb
..........\..\....\...............\_primary.dat,6073,2011-07-19
..........\..\....\...............\_primary.dbs,16268,2011-07-19
..........\..\....\...............\_primary.vhd,205,2011-07-19
..........\..\....\_info,878,2011-07-19
..........\..\....\_temp
..........\..\....\.....\vloge6tzzm,2885,2011-07-19
..........\..\....\.....\vlogenczft,6014,2011-07-19
..........\..\....\.....\vlogwci22s,6530,2011-07-19
..........\..\....\.....\vlogwng2ks,3831,2011-07-19
..........\..\....\_vmake,26,2011-07-19
